CAM-based single-chip shared buffer ATM switch

A novel single-chip shared buffer ATM switch architecture is presented, in which a content addressable memory (CAM) is used to control access to the shared buffer RAM, in place of a linked list mechanism. The switch operation is explained in detail, and its performance is compared to that of a linke...

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Bibliographic Details
Published inProceedings of ICC/SUPERCOMM'94 - 1994 International Conference on Communications pp. 1190 - 1195 vol.2
Main Authors Schultz, K.J., Gulak, P.G.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1994
Subjects
Associative memory
Asynchronous transfer mode
CADCAM
Computer aided manufacturing
Read-write memory
Silicon
Space technology
Switches
Switching circuits
Throughput
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Summary:A novel single-chip shared buffer ATM switch architecture is presented, in which a content addressable memory (CAM) is used to control access to the shared buffer RAM, in place of a linked list mechanism. The switch operation is explained in detail, and its performance is compared to that of a linked list switch. The memory capacity requirements are decreased, and cell storage and retrieval is simplified. Additional features are easily added, including priority handling and the first reported architectural support for multicasting in a single-chip shared buffer ATM switch. A novel parallel-to-serial memory is presented as an interface between the shared buffer and the output ports. Speed, area, power dissipation, and other physical performance parameters, are estimated.< >
ISBN:0780318250
9780780318250
DOI:10.1109/ICC.1994.368914