Complexity/performance tradeoffs with non-blocking loads

• Published in: Proceedings of 21 International Symposium on Computer Architecture pp. 211 - 222
• Main Authors: Farkas, K.I., Jouppi, N.P.
• Format: Conference Proceeding
• Language: English
• Published: IEEE Comput. Soc. Press 1994
• Subjects: Buffer storage; Costs; Delay; Educational institutions; Hardware; Instruments; Microprocessors; Processor scheduling; Registers

Non-blocking loads are a very effective technique for tolerating the cache-miss latency on data cache references. The authors describe several methods for implementing non-blocking loads. A range of resulting hardware complexity/performance tradeoffs are investigated using an object-code translation...