Development of Double-Layer-Stacked Silicon Interposer for 32×32 Micromirror Array Packaging

• Published in: IEEE ... Symposium on Mass Storage Systems and Technologies pp. 712 - 715
• Main Authors: Ling, Biyun, Cai, Minli, Chen, Dalong, Wang, Xiaoyue, Han, Yuwei, Wu, Yaming
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19.01.2025
• Subjects: Bonding; Cu-Sn bonding; double layer stack; High-voltage techniques; HVDC transmission; Micromechanical devices; micromirror array (MMA); Micromirrors; Packaging; Routing; Silicon; Silicon interposer; Thermal expansion; Through-silicon vias
• ISSN: 2160-1968
• DOI: 10.1109/MEMS61431.2025.10917859

Aimed at packaging our previously-developed bulk-silicon-micromachined 32×32 micromirror array (MMA) (33×34×0.4mm 3 in dimension and 4114 pads) while minimizing coefficient of thermal expansion (CTE) mismatch, this paper, for the first time, proposes a double-layer-stacked silicon interposer (DLSSI), which is 49.8×49.8×0.387mm 3 in dimension and has 8 redistribution layers (RDLs). It is realized by fabricating two single-layered silicon interposers (SLSIs) with 175μm thickness and 4 RDLs equally arranged on both sides, and then adopting Cu-Sn bonding to integrate them together. Compared to conventional silicon interposers, it exceeds the limit of thickness (caused by through-silicon-via (TSV)) and limit of RDLs number (caused by warpage). For the former, the DLSSI has higher structural strength for guaranteeing itself to go through packaging process intactly. For the latter, the DLSSI has higher routing capability for numerous and complicated electric interconnections. Herein, the total quantity of electrical interconnections in the DLSSI is 8336. Based on the DLSSI, a vertically integrated 32×32 MMA module that includes a PCB connector, 16 high voltage driver chips (HVDCs) and 80 capacitors is developed successfully.