Analysis of Different Impact of LDD Missing and Silicide Missing Defects on MOSFET Characteristic

• Published in: 2024 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) pp. 01 - 05
• Main Authors: Zheng, Shijun, Bian, Haijiao
• Format: Conference Proceeding
• Language: English
• Published: IEEE 15.07.2024
• Subjects: Failure analysis; failure mechanism; LDD missing defect; MOSFET; Nanoprobing analysis; Resistance; silicide missing defect; Silicides; Transistors; Transmission electron microscopy; Voltage
• ISSN: 1946-1550
• DOI: 10.1109/IPFA61654.2024.10691136

Metal-oxide-semiconductor field-effect transistor (MOSFET) is regarded as a most important modern electronic semiconductor device that is widely used in automobile chips. Nanoprobing analysis is considered to be an effective methodology to detect and localize lightly doped drain (LDD) missing and Ni- silicide missing defects hidden in failed MOSFET. It reveals that above two structural defects exhibit different impact on MOSFET transfer characteristic, so we offer analysts idea to select an optimal physical analysis solution especially critical for failure analysis (FA) success of end-user returned single sample. Current-voltage (I-V) characteristic shows that LDD missing defect causes 50-fold to around 100-fold on-state current drop while silicide missing defect just generates current decrease by about 50-fold or less. In addition, LDD missing defect does not affect junction I-V characteristic. In contrast, silicide missing defect increases drain (source) contact resistance. Silicide missing increases series resistance at W-Si interface while LDD missing brings severe hot electron effect to device. Considering physical analytical methods, wet chemical stain is a preferred technique to localize LDD missing site whereas the silicide missing place contained in a lamella is identified by transmission electron microscope (TEM). In conclusion, nanoprobing analysis combined with right physical analysis techniques correlates two failure mechanisms with MOSFET low on-state current anomaly theoretically and experimentally. The study enables wafer fabs to find out the root cause of subtle defects in the front-end-of-line (FEOL) process.