Comparative Analysis of Executing GPU Applications on FPGA: HLS vs. Soft GPU Approaches

• Published in: 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) pp. 634 - 641
• Main Authors: Ahn, Chihyo, Jeong, Shinnung, Cooper, Liam Paul, Parnenzini, Nicholas, Kim, Hyesoon
• Format: Conference Proceeding
• Language: English
• Published: IEEE 27.05.2024
• Subjects: FPGA; Graphics processing units; Hardware; High level Synthesis; Kernel; OpenCL; Parallel languages; Parallel programming; Pipelines; Soft GPU; User experience
• DOI: 10.1109/IPDPSW63119.2024.00123

With the development of the GPU, parallel languages are widely used for developing modern parallel applications. Given its low energy cost and programmable hardware, the FPGA emerges as a promising candidate to run GPU applications. Therefore, executing applications described in GPU programming languages on FPGA can offer new opportunities in terms of performance and energy efficiency. However, the gap between GPU programming languages and hardware description languages (HDL) poses a significant challenge for this transition. To overcome this problem, existing works have attempted to bridge this gap through high-level synthesis (HLS) or soft GPU. In this paper, we examine how HLS and soft GPU compile GPU languages for FPGA by discussing the detailed compilation and execution flow of two representative works: Intel FPGA SDK for OpenCL and Vortex. This paper also evaluates the coverage of both approaches and discusses methods for addressing the challenges each approach faces. Consequently, this paper explores the challenges HLS and GPU encounter, aiming to identify new problems and opportunities each approach introduces.