ELECTRONIC DEVICE FOR UPDATING FRAME ERROR RATE OF LINK AND OPERATION METHOD OF ELECTRONIC DEVICE
In an electronic device and an operation method of an electronic device according to various embodiments, the electronic device may comprise: a communication circuit for transmitting or receiving data through a plurality of links generated between an external electronic device and the electronic dev...
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Main Authors | , , , , , |
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Format | Patent |
Language | English French Korean |
Published |
16.03.2023
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Abstract | In an electronic device and an operation method of an electronic device according to various embodiments, the electronic device may comprise: a communication circuit for transmitting or receiving data through a plurality of links generated between an external electronic device and the electronic device; a memory for storing mapping data in which data rates and frame error rates for the plurality of links are mapped; and a processor operatively connected to the communication circuit and the memory, wherein the processor is configured to: in response to a request for transmitting a packet corresponding to a first type, identify a link, through which the number of packets less than a predesignated value have been transmitted or received, from among the plurality of links; transmit or receive a plurality of packets corresponding to a second type through the identified link; identify frame error rates for the plurality of packets corresponding to the second type; and update the mapping data on the basis of the identified frame error rates. Various other embodiments are possible.
Dans un dispositif électronique et un procédé de fonctionnement d'un dispositif électronique selon divers modes de réalisation, le dispositif électronique peut comprendre : un circuit de communication permettant de transmettre ou de recevoir des données par le biais d'une pluralité de liaisons générées entre un dispositif électronique externe et le dispositif électronique ; une mémoire permettant de stocker des données de mappage dans lesquelles des débits de données et des taux d'erreur de trame pour la pluralité de liaisons sont mappés ; et un processeur connecté fonctionnellement au circuit de communication et à la mémoire, le processeur étant configuré pour : en réponse à une demande de transmission d'un paquet correspondant à un premier type, identifier, parmi la pluralité de liaisons, une liaison par laquelle le nombre de paquets inférieur à une valeur pré-désignée ont été transmis ou reçus ; transmettre ou recevoir une pluralité de paquets correspondant à un second type par le biais de la liaison identifiée ; identifier des taux d'erreur de trame pour la pluralité de paquets correspondant au second type ; et mettre à jour les données de mappage d'après les taux d'erreur de trame identifiés. Divers autres modes de réalisation sont possibles.
다양한 실시예에 따른 전자 장치 및 전자 장치의 동작 방법에서, 전자 장치는 외부 전자 장치와 상기 전자 장치 사이에 생성된 복수의 링크를 통해 데이터를 전송하거나, 수신하는 통신 회로, 상기 복수의 링크들에 대한, 데이터 레이트 및 전송 실패율(frame error rate)이 매핑된 매핑 데이터를 저장하는 메모리 및 상기 통신 회로 및 상기 메모리와 작동적으로 연결된 프로세서를 포함하고, 상기 프로세서는 제 1 타입에 대응하는 패킷의 전송이 요구됨에 대응하여, 복수의 링크들 중 지정된 값보다 작은 수의 패킷을 전송하거나, 수신한 링크를 확인하고, 상기 확인된 링크를 통해 제 2 타입에 대응하는 복수의 패킷들을 전송하거나, 수신하고, 상기 제 2 타입에 대응하는 복수의 패킷들에 대한 전송 실패율을 확인하고, 상기 확인된 전송 실패율에 기반하여 상기 매핑 데이터를 업데이트하도록 설정될 수 있다. 이 밖에 다양한 실시예들이 가능하다. |
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AbstractList | In an electronic device and an operation method of an electronic device according to various embodiments, the electronic device may comprise: a communication circuit for transmitting or receiving data through a plurality of links generated between an external electronic device and the electronic device; a memory for storing mapping data in which data rates and frame error rates for the plurality of links are mapped; and a processor operatively connected to the communication circuit and the memory, wherein the processor is configured to: in response to a request for transmitting a packet corresponding to a first type, identify a link, through which the number of packets less than a predesignated value have been transmitted or received, from among the plurality of links; transmit or receive a plurality of packets corresponding to a second type through the identified link; identify frame error rates for the plurality of packets corresponding to the second type; and update the mapping data on the basis of the identified frame error rates. Various other embodiments are possible.
Dans un dispositif électronique et un procédé de fonctionnement d'un dispositif électronique selon divers modes de réalisation, le dispositif électronique peut comprendre : un circuit de communication permettant de transmettre ou de recevoir des données par le biais d'une pluralité de liaisons générées entre un dispositif électronique externe et le dispositif électronique ; une mémoire permettant de stocker des données de mappage dans lesquelles des débits de données et des taux d'erreur de trame pour la pluralité de liaisons sont mappés ; et un processeur connecté fonctionnellement au circuit de communication et à la mémoire, le processeur étant configuré pour : en réponse à une demande de transmission d'un paquet correspondant à un premier type, identifier, parmi la pluralité de liaisons, une liaison par laquelle le nombre de paquets inférieur à une valeur pré-désignée ont été transmis ou reçus ; transmettre ou recevoir une pluralité de paquets correspondant à un second type par le biais de la liaison identifiée ; identifier des taux d'erreur de trame pour la pluralité de paquets correspondant au second type ; et mettre à jour les données de mappage d'après les taux d'erreur de trame identifiés. Divers autres modes de réalisation sont possibles.
다양한 실시예에 따른 전자 장치 및 전자 장치의 동작 방법에서, 전자 장치는 외부 전자 장치와 상기 전자 장치 사이에 생성된 복수의 링크를 통해 데이터를 전송하거나, 수신하는 통신 회로, 상기 복수의 링크들에 대한, 데이터 레이트 및 전송 실패율(frame error rate)이 매핑된 매핑 데이터를 저장하는 메모리 및 상기 통신 회로 및 상기 메모리와 작동적으로 연결된 프로세서를 포함하고, 상기 프로세서는 제 1 타입에 대응하는 패킷의 전송이 요구됨에 대응하여, 복수의 링크들 중 지정된 값보다 작은 수의 패킷을 전송하거나, 수신한 링크를 확인하고, 상기 확인된 링크를 통해 제 2 타입에 대응하는 복수의 패킷들을 전송하거나, 수신하고, 상기 제 2 타입에 대응하는 복수의 패킷들에 대한 전송 실패율을 확인하고, 상기 확인된 전송 실패율에 기반하여 상기 매핑 데이터를 업데이트하도록 설정될 수 있다. 이 밖에 다양한 실시예들이 가능하다. |
Author | NAM, Chounjong JUNG, Junyeop JEONG, Mincheol CHOI, Junsu YANG, Changmok MIN, Sungbin |
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DocumentTitleAlternate | 링크의 프레임 에러율을 업데이트하는 전자 장치 및 전자 장치의 동작 방법 DISPOSITIF ÉLECTRONIQUE POUR METTRE À JOUR UN TAUX D'ERREUR DE TRAME D'UNE LIAISON ET PROCÉDÉ DE FONCTIONNEMENT D'UN DISPOSITIF ÉLECTRONIQUE |
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SubjectTerms | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION WIRELESS COMMUNICATIONS NETWORKS |
Title | ELECTRONIC DEVICE FOR UPDATING FRAME ERROR RATE OF LINK AND OPERATION METHOD OF ELECTRONIC DEVICE |
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