DSP ENGINE WITH IMPLICIT MIXED OPERANDS

A processor may have at least one multiplier unit which can be controlled to operate in a signed, an unsigned, or a mixed sign mode; a multiplier unit mode decoder coupled with the multiplier unit which receives location information of a first and second operands, wherein the multiplier mode decoder...

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Main Authors CATHERWOOD, MICHAEL, I, DURAISAMY, SETTU
Format Patent
LanguageEnglish
French
Published 02.12.2010
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Abstract A processor may have at least one multiplier unit which can be controlled to operate in a signed, an unsigned, or a mixed sign mode; a multiplier unit mode decoder coupled with the multiplier unit which receives location information of a first and second operands, wherein the multiplier mode decoder controls the multiplier unit when in the mixed sign mode depending on the location information to operate in a signed mode, an unsigned mode, or a combined signed/unsigned mode. L'invention porte sur un processeur qui peut avoir au moins une unité de multiplicateur qui peut être commandée pour fonctionner dans un mode signé, non signé ou à signe mixte ; un décodeur de mode d'unité de multiplicateur couplé à l'unité de multiplicateur qui reçoit des informations de localisation de premier et second opérandes, le décodeur de mode de multiplicateur commandant l'unité de multiplicateur dans le mode à signe mixte en fonction des informations de localisation pour fonctionner dans un mode signé, un mode non signé ou un mode signé/non signé combiné.
AbstractList A processor may have at least one multiplier unit which can be controlled to operate in a signed, an unsigned, or a mixed sign mode; a multiplier unit mode decoder coupled with the multiplier unit which receives location information of a first and second operands, wherein the multiplier mode decoder controls the multiplier unit when in the mixed sign mode depending on the location information to operate in a signed mode, an unsigned mode, or a combined signed/unsigned mode. L'invention porte sur un processeur qui peut avoir au moins une unité de multiplicateur qui peut être commandée pour fonctionner dans un mode signé, non signé ou à signe mixte ; un décodeur de mode d'unité de multiplicateur couplé à l'unité de multiplicateur qui reçoit des informations de localisation de premier et second opérandes, le décodeur de mode de multiplicateur commandant l'unité de multiplicateur dans le mode à signe mixte en fonction des informations de localisation pour fonctionner dans un mode signé, un mode non signé ou un mode signé/non signé combiné.
Author DURAISAMY, SETTU
CATHERWOOD, MICHAEL, I
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Chemistry
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Physics
DocumentTitleAlternate MOTEUR DSP AVEC OPÉRANDES MIXTES IMPLICITES
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RelatedCompanies DURAISAMY, SETTU
MICROCHIP TECHNOLOGY INCORPORATED
CATHERWOOD, MICHAEL, I
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Snippet A processor may have at least one multiplier unit which can be controlled to operate in a signed, an unsigned, or a mixed sign mode; a multiplier unit mode...
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SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title DSP ENGINE WITH IMPLICIT MIXED OPERANDS
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