STACKABLE SEMICONDUCTOR TEST SYSTEM AND METHOD FOR OPERATING SAME
A tester configured to stack with at least one other tester to provide a test system for simultaneously testing a number of devices in parallel on different testers, or testing a device having more pins than can be accommodated by a single tester. The tester includes a test site with a number of pin...
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Main Authors | , , |
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Format | Patent |
Language | English French |
Published |
10.04.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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