Chip scale package and related methods

Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall;...

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Bibliographic Details
Main Authors Su Bingzhi, Gochnour Derek, Kinsman Larry
Format Patent
LanguageEnglish
Published 05.09.2017
Subjects
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