Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme

• Main Authors: Kannan Balaji, Krishnan Siddarth A, Ando Takashi, Jagannathan Hemanth, Kwon Unoh, Rajaram Rekha
• Format: Patent
• Language: English
• Published: 01.08.2017
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of fabricating advanced node field effect transistors using a replacement metal gate process. The method includes dopant a high-k dielectric directly or indirectly by using layers composed of multi-layer thin film stacks, or in other embodiments, by a single blocking layer. By taking advantage of unexpected etch selectivity of the multi-layer stack or the controlled etch process of a single layer stack, etch damage to the high-k may be avoided and work function metal thicknesses can be tightly controlled which in turn allows field effect transistors with low Tinv (inverse of gate capacitance) mismatch.