Accurate sample latch offset compensation scheme

A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation trans...

Full description

Saved in:
Bibliographic Details
Main Authors Arcudia Kenneth Luis, Chen Minhan
Format Patent
LanguageEnglish
Published 04.04.2017
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Online AccessGet full text

Cover

More Information
Summary:A receiver according to one aspect comprises a latch configured to sample a data signal according to a sampling clock signal, and a plurality of offset-compensation segments, wherein each of the segments is coupled to an internal node of the latch. Each of the segments comprises a compensation transistor, and a step-adjustment transistor coupled in series with the compensation transistor. The receiver further comprises an offset controller configured to selectively turn on one or more of the compensations transistors to reduce an offset voltage of the latch, and a bias circuit configured to apply a bias voltage to a gate of each of one or more of the step-adjustment transistors.
Bibliography:Application Number: US201514818091