SRAM cell and method for manufacturing the same
A SRAM cell and a method for manufacturing the same are disclosed. In one embodiment, the SRAM cell may include: a semiconductor layer; and a first Fin Field Effect Transistor (FinFET) and a second FinFET formed on the semiconductor layer, wherein the first FinFET includes a first fin formed by patt...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
24.11.2015
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | A SRAM cell and a method for manufacturing the same are disclosed. In one embodiment, the SRAM cell may include: a semiconductor layer; and a first Fin Field Effect Transistor (FinFET) and a second FinFET formed on the semiconductor layer, wherein the first FinFET includes a first fin formed by patterning the semiconductor layer, the first fin having a first top surface and a first bottom surface, wherein the second FinFET includes a second fin formed by patterning the semiconductor layer, the second fin having a second top surface and a second bottom surface, and wherein the first top surface is substantially flush with the second top surface, the first and second bottom surfaces abut against the semiconductor layer, and the height of the second fin is greater than the height of the first fin. |
---|---|
AbstractList | A SRAM cell and a method for manufacturing the same are disclosed. In one embodiment, the SRAM cell may include: a semiconductor layer; and a first Fin Field Effect Transistor (FinFET) and a second FinFET formed on the semiconductor layer, wherein the first FinFET includes a first fin formed by patterning the semiconductor layer, the first fin having a first top surface and a first bottom surface, wherein the second FinFET includes a second fin formed by patterning the semiconductor layer, the second fin having a second top surface and a second bottom surface, and wherein the first top surface is substantially flush with the second top surface, the first and second bottom surfaces abut against the semiconductor layer, and the height of the second fin is greater than the height of the first fin. |
Author | ZHU HUILONG LIANG QINGQING |
Author_xml | – fullname: LIANG QINGQING – fullname: ZHU HUILONG |
BookMark | eNrjYmDJy89L5WTQDw5y9FVITs3JUUjMS1HITS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocGWhpZmpiaGTkbGRCgBAG8jK7U |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | US9196541B2 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_US9196541B23 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 23 07:04:56 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_US9196541B23 |
Notes | Application Number: US201113509912 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151124&DB=EPODOC&CC=US&NR=9196541B2 |
ParticipantIDs | epo_espacenet_US9196541B2 |
PublicationCentury | 2000 |
PublicationDate | 20151124 |
PublicationDateYYYYMMDD | 2015-11-24 |
PublicationDate_xml | – month: 11 year: 2015 text: 20151124 day: 24 |
PublicationDecade | 2010 |
PublicationYear | 2015 |
RelatedCompanies | INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES ZHU HUILONG LIANG QINGQING |
RelatedCompanies_xml | – name: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES – name: ZHU HUILONG – name: LIANG QINGQING |
Score | 3.009039 |
Snippet | A SRAM cell and a method for manufacturing the same are disclosed. In one embodiment, the SRAM cell may include: a semiconductor layer; and a first Fin Field... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | SRAM cell and method for manufacturing the same |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151124&DB=EPODOC&locale=&CC=US&NR=9196541B2 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8haJSbokbwIz2Y3RbY1oE7LMZ9hZgMCGOGG2lHl3BgEDfiv-9rHehFb02b9OOl773fa_t7BXhCl0DNfm7rFLGwToVpoB3MVrpgTpbjps64SqQdjwejlL4t7EUD1gcujMoT-qmSI6JGZajvlbLXu59DrEC9rSx7fI1V25do7gZaHR0bEj5QLfDccDoJJr7m-26aaOOZ68jMedTw0FqfIIoeSmUI3z1JStn99ijRBZxOsbOiuoSGKNpw7h8-XmvDWVzfd2OxVr3yCnrJ7DUm8pydYPBPvn9-Jgg5yYYVe8lPUIRDgoCOlGwjroFE4dwf6Tjy8rjKZZoc52jdQBODf3ELJM8pc8whN23O6IBxbjnW88rIDAsNU953OtD5s5vuP2130JLikqw6k95Ds_rYiwd0rxV_VIL5AjEIfrU |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8haMSbokb87MHstsC2DtxhMbKPTGWDwGa4LevoEg4MIiP--75WQC96a9qkHy997_1e298rwAO6BKp3ClOliIVVynUN7WA-U3lm5QVu6pzJRNph1A0S-jo1pzWY77gwMk_op0yOiBqVo75X0l6vfg6xXPm2ct1mc6xaPvmx7Srb6FgT8IEqbt_2RkN36CiOYycTJRrblsicR7U-WusDRNg9oQzee1-QUla_PYp_Aocj7KysTqHGyyY0nN3Ha004Crf33Vjcqt76DNqT8XNIxDk7weCffP_8TBBykkVWbgQ_QRIOCQI6ss4W_ByI78VOoOLI6X6VaTLZz9G4gDoG__wSSFHQzNJ7TDdZRrsZY4ZlPM60XDPQMBUdqwWtP7u5-qftHhpBHA7SwUv0dg3HQnSCYafTG6hXHxt-i662YndSSF9NTYGo |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=SRAM+cell+and+method+for+manufacturing+the+same&rft.inventor=LIANG+QINGQING&rft.inventor=ZHU+HUILONG&rft.date=2015-11-24&rft.externalDBID=B2&rft.externalDocID=US9196541B2 |