Memory bus architecture for concurrently supporting volatile and non-volatile memory modules

A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory...

Full description

Saved in:
Bibliographic Details
Main Authors HINKLE JONATHAN R, SWEERE PAUL
Format Patent
LanguageEnglish
Published 18.02.2014
Subjects
Online AccessGet full text

Cover

Loading…
Abstract A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
AbstractList A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Author HINKLE JONATHAN R
SWEERE PAUL
Author_xml – fullname: HINKLE JONATHAN R
– fullname: SWEERE PAUL
BookMark eNqNjMsKwjAQAHPQg69_2B8oSMXqWVG8eFJvQonpVgPpbthshP69guLZ08AwzNgMiAlH5nrEjqWHW05gxT28otMsCC0LOCaXRZA09JByjCzq6Q5PDlZ9QLDUwPtT_ET3uXXc5IBpaoatDQlnX04M7Hfn7aHAyDWmaB0San05ratlNV-Vm3LxR_ICKDE-pA
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
ExternalDocumentID US8656072B2
GroupedDBID EVB
ID FETCH-epo_espacenet_US8656072B23
IEDL.DBID EVB
IngestDate Fri Jul 19 15:07:34 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US8656072B23
Notes Application Number: US201113236416
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140218&DB=EPODOC&CC=US&NR=8656072B2
ParticipantIDs epo_espacenet_US8656072B2
PublicationCentury 2000
PublicationDate 20140218
PublicationDateYYYYMMDD 2014-02-18
PublicationDate_xml – month: 02
  year: 2014
  text: 20140218
  day: 18
PublicationDecade 2010
PublicationYear 2014
RelatedCompanies SANMINA-SCI CORPORATION
HINKLE JONATHAN R
SWEERE PAUL
RelatedCompanies_xml – name: SANMINA-SCI CORPORATION
– name: SWEERE PAUL
– name: HINKLE JONATHAN R
Score 2.9159725
Snippet A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI...
SourceID epo
SourceType Open Access Repository
SubjectTerms CALCULATING
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PHYSICS
PRINTED CIRCUITS
Title Memory bus architecture for concurrently supporting volatile and non-volatile memory modules
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140218&DB=EPODOC&locale=&CC=US&NR=8656072B2
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1La8JAEB7EPm-tbal9sYeSW6hJNm48hIKJIgUfVC0eCpJNNiBEDU1C8d93dtXUS3udhWFnlnntznwL8Cxis2XajqU7gdHUaatB9YDzls4jU0j0EW4rsOr-oNmb0reZPavAYj8Lo3BCvxU4IlpUiPaeK3-d_l5i-aq3MnvhCyStX7sT19d21TFWCxiyNL_tdkZDf-hpnudOx9rg3XUkyAwz2-itj2QWLWH2Ox9tOZSSHkaU7gUcj5DZKr-EiljV4Mzbf7xWg9P-7r27BieqQTPMkLgzwuwKPvuyO3ZDeJGRw3cAgvknwfI23EIuJRuSFalMrzE6EfRCKFYiSLCKCJb8eklYbrkt11GRiOwaSLcz8Xo6bnheKmc-HZeiWTdQRQbiFghnMaehxYyIRpQ5cWAKizIWB2HMGng6daj_yebun7V7OJdalm3LhvMA1fyrEI8YlXP-pPT5A1dDlFI
link.rule.ids 230,309,786,891,25594,76906
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1La8JAEB7EPuyttS21zz2U3EI12bjxEAomim2NStXioSDZZAOCL5qE4r_v7Pqol_Y6C8POLPPanfkW4FHERs2wbFO3g0pVp7Uy1QPOazqPDCHRR7ilwKr9TrU1pK8ja5SDyXYWRuGEfitwRLSoEO09Vf56-XuJ5aneyuSJT5C0eG4OHE_bVMdYLWDI0ry60-h1va6rua4z7Gudd8eWIDPMqKO3PmASnFdmTh91OZSy3I8ozVM47CGzeXoGOTEvQsHdfrxWhGN_895dhCPVoBkmSNwYYXIOn77sjl0RniVk_x2AYP5JsLwN15BL0xVJsqVMrzE6EfRCKNZUkGAeESz59R1htuY2W0TZVCQXQJqNgdvSccPjnXLGw_5ONPMS8shAXAHhLOY0NFklohFldhwYwqSMxUEYszKeTglKf7K5_mftAQqtgd8et186bzdwIjUuW5gr9i3k069M3GGETvm90u0PcHGXPw
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Memory+bus+architecture+for+concurrently+supporting+volatile+and+non-volatile+memory+modules&rft.inventor=HINKLE+JONATHAN+R&rft.inventor=SWEERE+PAUL&rft.date=2014-02-18&rft.externalDBID=B2&rft.externalDocID=US8656072B2