Data rate buffering in display port links
Rate matching for use in data links between a source device and a sink device is provided. A rate matching device includes a first-in-first-out (FIFO) buffer having a write pointer and a read pointer; a write control having a write clock to write an input data stream from the source device onto the...
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Main Author | |
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Format | Patent |
Language | English |
Published |
30.04.2013
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Subjects | |
Online Access | Get full text |
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