Gate controlled field emission triode and process for fabricating the same

This invention relates to a process for fabricating ZnO nanowires with high aspect ratio at low temperature, which is associated with semiconductor manufacturing process and a gate controlled field emission triode is obtained. The process comprises providing a semiconductor substrate, depositing a d...

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Bibliographic Details
Main Authors LEE CHIA-YING, LIN PANG, LI SEU-YI, TSENG TSEUNG-YUAN
Format Patent
LanguageEnglish
Published 18.09.2012
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Summary:This invention relates to a process for fabricating ZnO nanowires with high aspect ratio at low temperature, which is associated with semiconductor manufacturing process and a gate controlled field emission triode is obtained. The process comprises providing a semiconductor substrate, depositing a dielectric layer and a conducting layer, respectively, on the semiconductor substrate, defining the positions of emitter arrays on the dielectric layer and conducting layer, depositing an ultra thin ZnO film as a seeding layer on the substrate, growing the ZnO nanowires as the emitter arrays by using hydrothermal process, and etching the areas excluding the emitter arrays, then obtaining the gate controlled field emission triode.
Bibliography:Application Number: US20090386161