Semiconductor integrated circuit and circuit operation method

In a semiconductor integrated circuit wherein low-threshold-voltage and high-threshold-voltage transistors are disposed mixedly, the operating speed of each transistor can be properly controlled in speed control execution through regulation of a power supply voltage VDD. The semiconductor integrated...

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Bibliographic Details
Main Authors KANNO YUSUKE, OTSUGA KAZUO
Format Patent
LanguageEnglish
Published 21.08.2012
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Summary:In a semiconductor integrated circuit wherein low-threshold-voltage and high-threshold-voltage transistors are disposed mixedly, the operating speed of each transistor can be properly controlled in speed control execution through regulation of a power supply voltage VDD. The semiconductor integrated circuit comprises an internal circuit and measuring circuits. The internal circuit comprises a low-threshold-voltage MOS transistor and a high-threshold-voltage MOS transistor, and the degree of threshold voltage variation of the low-threshold-voltage MOS transistor is larger than the degree of threshold voltage variation of the high-threshold-voltage MOS transistor. The measuring circuit detects which one of fast, typical, and slow states is taken by both the low-threshold-voltage MOS transistor and the high-threshold-voltage MOS transistor. When the result data detected indicates the fast state, the power supply voltage VDD is set to a lower power supply voltage level "VDD− VDD" corresponding to a small variation gradient " [V/ ]". When the result data detected indicates the typical state, the power supply voltage VDD is set to an intermediate power supply voltage level "VDD±0". When the result data detected indicates the slow state, the power supply voltage VDD is set to a higher power supply voltage level "VDD+ VDD" corresponding to a large variation gradient "α[V/ ]".
Bibliography:Application Number: US20100787090