Apparatus and method for performing blit operations across parallel processors

A method of performing a blit operation in a parallel processing system includes dividing a blit operation into batches of pixels, performing reads of pixels associated with a first batch in any order, confirming that all reads of pixels associated with the first batch are completed, and performing...

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Main Authors FRENCH MARK J, LEGAKIS JUSTIN S, MULIADI LUKITO, MOLNAR STEVEN E
Format Patent
LanguageEnglish
Published 15.11.2011
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Abstract A method of performing a blit operation in a parallel processing system includes dividing a blit operation into batches of pixels, performing reads of pixels associated with a first batch in any order, confirming that all reads of pixels associated with the first batch are completed, and performing writes of pixels associated with the first batch in any order. The pixels of the first batch and pixels of additional batches are applied to parallel processors, where the parallel processors include a corral defined by entry points and exit points distributed across the parallel processors.
AbstractList A method of performing a blit operation in a parallel processing system includes dividing a blit operation into batches of pixels, performing reads of pixels associated with a first batch in any order, confirming that all reads of pixels associated with the first batch are completed, and performing writes of pixels associated with the first batch in any order. The pixels of the first batch and pixels of additional batches are applied to parallel processors, where the parallel processors include a corral defined by entry points and exit points distributed across the parallel processors.
Author LEGAKIS JUSTIN S
MOLNAR STEVEN E
MULIADI LUKITO
FRENCH MARK J
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MULIADI LUKITO
NVIDIA CORPORATION
FRENCH MARK J
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Snippet A method of performing a blit operation in a parallel processing system includes dividing a blit operation into batches of pixels, performing reads of pixels...
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COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title Apparatus and method for performing blit operations across parallel processors
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