Fuse link structures using film stress for programming and methods of manufacture

A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portio...

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Main Authors BARTH KARL W, LEE TOM C, PETRARCA KEVIN S, GAMBINO JEFFREY P
Format Patent
LanguageEnglish
Published 22.02.2011
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Abstract A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.
AbstractList A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at least one STI and depositing an interlevel dielectric (ILD) layer over the e-fuse. Additionally, the method includes removing at least a portion of the at least one STI under the e-fuse to provide an air gap below a portion of the e-fuse and removing at least a portion of the ILD layer over the e-fuse to provide the air gap above the portion of the e-fuse.
Author GAMBINO JEFFREY P
PETRARCA KEVIN S
BARTH KARL W
LEE TOM C
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Snippet A method of forming a programmable fuse structure includes forming at least one shallow trench isolation (STI) in a substrate, forming an e-fuse over the at...
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SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title Fuse link structures using film stress for programming and methods of manufacture
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