Memory module having signal lines configured for sequential arrival of signals at synchronous memory devices
A memory module includes a first signal line to carry a first signal. The first signal line has (i) a first line segment disposed along a length of the memory module and coupled to a termination, and (ii) a second line segment disposed along a width of the memory module and coupled to an edge finger...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
11.01.2011
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Subjects | |
Online Access | Get full text |
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Abstract | A memory module includes a first signal line to carry a first signal. The first signal line has (i) a first line segment disposed along a length of the memory module and coupled to a termination, and (ii) a second line segment disposed along a width of the memory module and coupled to an edge finger. The first line segment and the second line segment are coupled together at a turn. A first synchronous memory device and a second synchronous memory device are coupled to the first line segment. The first signal arrives at the first synchronous memory device and the second synchronous memory device in a sequential manner. The memory module includes a clock line routed alongside the first signal line. A clock signal arrives at the first synchronous memory device and the second synchronous memory device in sequence alongside the first signal traversing along the first signal line. |
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AbstractList | A memory module includes a first signal line to carry a first signal. The first signal line has (i) a first line segment disposed along a length of the memory module and coupled to a termination, and (ii) a second line segment disposed along a width of the memory module and coupled to an edge finger. The first line segment and the second line segment are coupled together at a turn. A first synchronous memory device and a second synchronous memory device are coupled to the first line segment. The first signal arrives at the first synchronous memory device and the second synchronous memory device in a sequential manner. The memory module includes a clock line routed alongside the first signal line. A clock signal arrives at the first synchronous memory device and the second synchronous memory device in sequence alongside the first signal traversing along the first signal line. |
Author | NGUYEN DAVID LIAW HAW-JYH |
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Notes | Application Number: US20090426083 |
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RelatedCompanies | RAMBUS INC |
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Snippet | A memory module includes a first signal line to carry a first signal. The first signal line has (i) a first line segment disposed along a length of the memory... |
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SubjectTerms | CALCULATING CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PHYSICS PRINTED CIRCUITS STATIC STORES |
Title | Memory module having signal lines configured for sequential arrival of signals at synchronous memory devices |
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