Shared interrupt control method and system for a digital signal processor
Techniques for the design and use of a digital signal processor, including (but not limited to) processing transmissions in a communications (e.g., CDMA) system. The disclosed method and system process interrupts arising in a multithreaded processor by receiving in an interrupt register a plurality...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
20.04.2010
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Subjects | |
Online Access | Get full text |
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