Shared interrupt control method and system for a digital signal processor

Techniques for the design and use of a digital signal processor, including (but not limited to) processing transmissions in a communications (e.g., CDMA) system. The disclosed method and system process interrupts arising in a multithreaded processor by receiving in an interrupt register a plurality...

Full description

Saved in:
Bibliographic Details
Main Authors CODRESCU LUCIAN, ANDERSON WILLIAM C
Format Patent
LanguageEnglish
Published 20.04.2010
Subjects
Online AccessGet full text

Cover

Loading…