Data sharing apparatus and processor for sharing data between processors of different endianness

The data sharing apparatus in the present invention includes a first processor and a second processor, each of a different endianness, that are both connected to the memory via the data bus, in a byte order based on the endianness of the first processor. It also includes an address conversion unit w...

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Bibliographic Details
Main Authors IKAWA SATOSHI, FUNAHASHI KAZUTOSHI, NAGAYASU MASARU
Format Patent
LanguageEnglish
Published 08.09.2009
Subjects
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