Trench isolation structure for a semiconductor device with reduced sidewall stress and a method of manufacturing the same
By forming a non-oxidizable liner in isolation trenches, the creation of compressive stress may be significantly reduced, wherein, in illustrative embodiments, silicon nitride may be used as liner material. For this purpose, the etch behavior of the silicon nitride may be efficiently modified on the...
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Format | Patent |
Language | English |
Published |
15.04.2008
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Online Access | Get full text |
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Abstract | By forming a non-oxidizable liner in isolation trenches, the creation of compressive stress may be significantly reduced, wherein, in illustrative embodiments, silicon nitride may be used as liner material. For this purpose, the etch behavior of the silicon nitride may be efficiently modified on the basis of an appropriate surface treatment, thereby providing a high degree of material integrity during a subsequent etch process for removing non-modified portions of silicon nitride, which may also be used as an efficient CMP stop layer. |
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AbstractList | By forming a non-oxidizable liner in isolation trenches, the creation of compressive stress may be significantly reduced, wherein, in illustrative embodiments, silicon nitride may be used as liner material. For this purpose, the etch behavior of the silicon nitride may be efficiently modified on the basis of an appropriate surface treatment, thereby providing a high degree of material integrity during a subsequent etch process for removing non-modified portions of silicon nitride, which may also be used as an efficient CMP stop layer. |
Author | PRUEFER EKKEHARD KRUEGEL STEPHAN HEMPEL KLAUS |
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Snippet | By forming a non-oxidizable liner in isolation trenches, the creation of compressive stress may be significantly reduced, wherein, in illustrative embodiments,... |
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SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Trench isolation structure for a semiconductor device with reduced sidewall stress and a method of manufacturing the same |
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