Electronic apparatus and power supplying method
A system LSI contains a main circuit and an eDRAM. The main circuit contains a standby controlling circuit and a CPU. Each circuit block receives power through independent power lines. Power is always supplied to the standby controlling circuit. When the system LSI has entered a standby state, power...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
31.10.2006
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | A system LSI contains a main circuit and an eDRAM. The main circuit contains a standby controlling circuit and a CPU. Each circuit block receives power through independent power lines. Power is always supplied to the standby controlling circuit. When the system LSI has entered a standby state, power to the main circuit is turned off. Only when the eDRAM is used, power is supplied thereto. The standby controlling circuit and a power controlling circuit control power supplied to each circuit block. When there is no task the CPU has to process, the system LSI enters the standby state from the operation state. When an operation input has taken place with an operating portion or when an input has taken place in an external input, the standby controlling circuit performs a process necessary for waking up the system LSI. Power is supplied to the main circuit. |
---|---|
AbstractList | A system LSI contains a main circuit and an eDRAM. The main circuit contains a standby controlling circuit and a CPU. Each circuit block receives power through independent power lines. Power is always supplied to the standby controlling circuit. When the system LSI has entered a standby state, power to the main circuit is turned off. Only when the eDRAM is used, power is supplied thereto. The standby controlling circuit and a power controlling circuit control power supplied to each circuit block. When there is no task the CPU has to process, the system LSI enters the standby state from the operation state. When an operation input has taken place with an operating portion or when an input has taken place in an external input, the standby controlling circuit performs a process necessary for waking up the system LSI. Power is supplied to the main circuit. |
Author | AKUI SATOSHI UEDA TOMOHIRO KIBA HIROYUKI |
Author_xml | – fullname: KIBA HIROYUKI – fullname: AKUI SATOSHI – fullname: UEDA TOMOHIRO |
BookMark | eNrjYmDJy89L5WTQd81JTS4pys_LTFZILChILEosKS1WSMxLUSjIL08tUiguLSjIqczMS1fITS3JyE_hYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocHmhsaGBoYWTkbGRCgBAAAmLNU |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
ExternalDocumentID | US7131018B2 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_US7131018B23 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 15:02:27 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_US7131018B23 |
Notes | Application Number: US20030678100 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061031&DB=EPODOC&CC=US&NR=7131018B2 |
ParticipantIDs | epo_espacenet_US7131018B2 |
PublicationCentury | 2000 |
PublicationDate | 20061031 |
PublicationDateYYYYMMDD | 2006-10-31 |
PublicationDate_xml | – month: 10 year: 2006 text: 20061031 day: 31 |
PublicationDecade | 2000 |
PublicationYear | 2006 |
RelatedCompanies | SONY CORPORATION |
RelatedCompanies_xml | – name: SONY CORPORATION |
Score | 2.6546748 |
Snippet | A system LSI contains a main circuit and an eDRAM. The main circuit contains a standby controlling circuit and a CPU. Each circuit block receives power through... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CALCULATING CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTINGELECTRIC POWER COMPUTING CONVERSION OR DISTRIBUTION OF ELECTRIC POWER COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERATION INFORMATION STORAGE PHYSICS PULSE TECHNIQUE SEMICONDUCTOR DEVICES STATIC STORES SYSTEMS FOR STORING ELECTRIC ENERGY |
Title | Electronic apparatus and power supplying method |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20061031&DB=EPODOC&locale=&CC=US&NR=7131018B2 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LSwMxEB5KfdSbror1RQ6yt6XWTXfjYRH2RRH6wHalt5LdROhlu5gt_v1OYrt60UsOCQxJYCaZZL7vA3jgTzkVLmYnz8z1HIySzGHYOr6GXfJHv-gbLMxo7A0z-roYLFqw2mNhDE_olyFHRI8q0N9rE6-rn0es2NRWql6-wq71SzoPYrvJjrVqgR2HQTKdxJPIjqIgm9njtwBzMc1NFWK0PsBbtK-rv5L3UINSqt8nSnoKh1M0VtZn0JKlBZ1oL7xmwfFo999twZEp0CwUdu6cUJ1DL2mkawivDHf3RhFeClJpyTOitFCnRi-Rb3noCyBpMo-GDs5h2ax3mc2a2bqX0C7XpbwCIqRgHwWVrHD7VN-SOBeaXEX41ON04Heh-6eZ63_GbuDEPCuYeHwL7fpzI-_woK3ze7NFW2IpgUU |
link.rule.ids | 230,309,783,888,25578,76884 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV07T8MwED5V5VE2CCDK0wPKFpWSNDFDhJSXAjRpRRPULXLjIHVJI5KKv8_ZtIEFFg-2ZJ0t3fnO9vd9ALfsfmFwHauTB6qbGkZJqlFsNUvALtmdlQ8lFiaKzTA1nuejeQeWWyyM5An9lOSI6FE5-nsj43X1c4nlyb-V9WCxxK7VY5DYntpWx0K1QPUc259OvImruq6dztT41cZaTHBTORitdzDDpoJm339zBCil-n2iBIewO8XJyuYIOkWpQM_dCq8psB9t3rsV2JMfNPMaOzdOWB_DwG-lawirJHf3uias5KQSkmekFkKdAr1EvuWhT4AEfuKGGtqQtevN0llrrX4K3XJVFmdAeMHpe24UNNeHhsiSGOOCXIVbhsmMkdWH_p_TnP8zdgO9MInG2fgpfrmAA3nFIGPzJXSbj3VxhYdus7iW2_UFmguENQ |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Electronic+apparatus+and+power+supplying+method&rft.inventor=KIBA+HIROYUKI&rft.inventor=AKUI+SATOSHI&rft.inventor=UEDA+TOMOHIRO&rft.date=2006-10-31&rft.externalDBID=B2&rft.externalDocID=US7131018B2 |