Memory controller with AC power reduction through non-return-to-idle of address and control signals

A memory controller and method for a memory device avoids returning the state of address and/or preselected control lines to idle when the chip select signal is de-asserted. The preselected control signals are selected from the control signals sent to the memory device that are ignored by the memory...

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Bibliographic Details
Main Author WILCOX JEFFREY R
Format Patent
LanguageEnglish
Published 04.03.2003
Edition7
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory controller and method for a memory device avoids returning the state of address and/or preselected control lines to idle when the chip select signal is de-asserted. The preselected control signals are selected from the control signals sent to the memory device that are ignored by the memory device when the chip select signal is de-asserted. By not returning to idle, power dissipation caused by toggling of signal lines is reduced.
Bibliography:Application Number: US20020042862