Combined branch prediction and cache prefetch in a microprocessor

• Main Authors: BONDI; JAMES O, SHIELL; JONATHAN H
• Format: Patent
• Language: English
• Published: 12.09.2000
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A microprocessor (10) and corresponding system (300) is disclosed in which prefetch of instruction or data from higher level memory (11; 307; 305) may be performed in combination with a fetch from a lower level cache (16). A branch target buffer (56) has a plurality of entries (63) associated with b...