Dynamic control of power consumption in self-timed circuits
A system and method are provided which automatically change the rate of data transfer between stages of control logic connected in a pipelined fashion, based upon a control signal generated by a sensor which determines the power consumption of the integrated circuit. Delay circuits are disposed inte...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
07.04.1998
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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Abstract | A system and method are provided which automatically change the rate of data transfer between stages of control logic connected in a pipelined fashion, based upon a control signal generated by a sensor which determines the power consumption of the integrated circuit. Delay circuits are disposed intermediate of each stage in the pipeline and receive an input from the sensor which is connected to the delay circuits. The data input to the next subsequent stage from the previous stage in the pipeline is gated based on the state of the delay circuitry. That is, when the sensor determines that a high power condition exists, the delay circuitry is enabled such that the data transfer between stages in the pipeline slows down. However, when the sensor determines that the power consumption situation is at an acceptable level, the delay circuitry is disabled such that data can then be transferred between stages in the pipeline at a high frequency. |
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AbstractList | A system and method are provided which automatically change the rate of data transfer between stages of control logic connected in a pipelined fashion, based upon a control signal generated by a sensor which determines the power consumption of the integrated circuit. Delay circuits are disposed intermediate of each stage in the pipeline and receive an input from the sensor which is connected to the delay circuits. The data input to the next subsequent stage from the previous stage in the pipeline is gated based on the state of the delay circuitry. That is, when the sensor determines that a high power condition exists, the delay circuitry is enabled such that the data transfer between stages in the pipeline slows down. However, when the sensor determines that the power consumption situation is at an acceptable level, the delay circuitry is disabled such that data can then be transferred between stages in the pipeline at a high frequency. |
Author | KLIM; PETER JUERGEN DURHAM; CHRISTOPHER MCCALL |
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Notes | Application Number: US19960671189 |
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PublicationDateYYYYMMDD | 1998-04-07 |
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Snippet | A system and method are provided which automatically change the rate of data transfer between stages of control logic connected in a pipelined fashion, based... |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | Dynamic control of power consumption in self-timed circuits |
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