Charge transfer multiplier and filter

• Main Authors: VOGELSONG; THOMAS L, TIEMANN; JEROME J
• Format: Patent
• Language: English
• Published: 22.04.1986
• Edition: 4
• Subjects: BASIC ELECTRONIC CIRCUITRY; CALCULATING; COMPUTING; COUNTING; ELECTRICITY; HYBRID COMPUTING ARRANGEMENTS; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; PHYSICS; RESONATORS

The signal processing apparatus includes a plurality of multiplying or charge splitting stages connected in series. A plurality of pairs of control words are provided, one word of each pair being the complement of the other word of the pair. Each pair of words is associated with a respective multiplying stage and represents the multiplying coefficient of a respective multiplying stage. Means are provided for forming a plurality of quantities of charge, each representing a respective sample of an analog signal. Each of the quantities of charge is introduced in sequence into each of the multiplying stages in which it is processed and then passed on to the next multiplying stage. The process operation in each of the multiplying stages includes dividing the quantity of charge in a series of splitting operations under the control of the pair of words associated with the stage into two parts. All of the first parts of each of the quantities of charge in each of the stages is summed. All of the second part of each of the quantities of charge in each of the stages is summed. A signal is derived representing the difference of the two sums of charge. The two parts of each quantity of charge are combined and passed to the next multiplying stage.