ORING FET CONTROL CIRCUIT AND METHOD

An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output volt...

Full description

Saved in:
Bibliographic Details
Main Authors Liang, Chih-Wei, Yeh, Yung-Sheng
Format Patent
LanguageEnglish
Published 04.04.2024
Subjects
Online AccessGet full text

Cover

Loading…
Abstract An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.
AbstractList An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a diode and a driving unit. The positive and negative input terminals of the comparator are electrically connected to the input and output voltages. The first resistor, the second resistor, the first capacitor, and the third resistor are electrically connected in series between a reference voltage and a ground terminal sequentially. The reference voltage is lower than a voltage at the positive input terminal. When the input voltage is lower than the output voltage, if a voltage across the ORing FET is larger than a threshold, the comparator outputs a driving signal at low level, and correspondingly the driving unit turns off the ORing FET. The threshold depends on resistances of the first and second resistors.
Author Yeh, Yung-Sheng
Liang, Chih-Wei
Author_xml – fullname: Liang, Chih-Wei
– fullname: Yeh, Yung-Sheng
BookMark eNrjYmDJy89L5WRQ8Q_y9HNXcHMNUXD29wsJ8vdRcPYMcg71DFFw9HNR8HUN8fB34WFgTUvMKU7lhdLcDMpADc4euqkF-fGpxQWJyal5qSXxocFGBkYmhobG5gbGjobGxKkCAN8TJXE
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID US2024113703A1
GroupedDBID EVB
ID FETCH-epo_espacenet_US2024113703A13
IEDL.DBID EVB
IngestDate Fri Jul 19 12:47:26 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US2024113703A13
Notes Application Number: US202318371371
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240404&DB=EPODOC&CC=US&NR=2024113703A1
ParticipantIDs epo_espacenet_US2024113703A1
PublicationCentury 2000
PublicationDate 20240404
PublicationDateYYYYMMDD 2024-04-04
PublicationDate_xml – month: 04
  year: 2024
  text: 20240404
  day: 04
PublicationDecade 2020
PublicationYear 2024
RelatedCompanies Delta Electronics, Inc
RelatedCompanies_xml – name: Delta Electronics, Inc
Score 3.5218592
Snippet An ORing FET control circuit and method are provided. The circuit includes an ORing FET, a comparator, first, second and third resistors, a first capacitor, a...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
Title ORING FET CONTROL CIRCUIT AND METHOD
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240404&DB=EPODOC&locale=&CC=US&NR=2024113703A1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFPVNp-LHlICjb8V2TWv7UGRLWjqx7eha2dugXQqCzOEq_vteQqd7GnnJ9xe5XH7J3QVgMHRtWxhOJbVxXJ0Ky9E91xvq9VOFJUxRC0tqI8eJExX0ZW7PO_Cx1YVRdkJ_lHFEpKgK6b1R-_X6_xKLK9nKzWP5jlGfz2Huc61Fx8ie0Gl87AfTlKdMY8wvZlqSqTTTtHB9jxArHciDtLS0H7yNpV7KepephKdwOMX6Vs0ZdMSqB8ds-_daD47i9skbvS31bc5hkErRBRIGOWFpkmfpK2GTjBWTnIwSTuIgj1J-AQ-YgUU6Nrf4G92imO32zbqELuJ-cQUEsYaH_LqmYmlQc2m5pe0ta1FRo0T0WBnX0N9X083-5Fs4kUElhEL70G2-vsUd8temvFfT8gtoh3k0
link.rule.ids 230,309,786,891,25594,76906
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFOebTsXp1IKjb8V2_Vj7UGRLW1rtx-ha2dugbQqCzOEq_vteQqd7GnkJuXyTy-WX3F0ARmNT16lslMwax5Q0qhqSZVpjqZ6UWEKhNVWZNXIUG36uvSz1ZQc-drYw3E_oD3eOiBxVIr83fL_e_F9iOVy3cvtUvGPS57OX2Y7YomMUTxhEZ2a788RJiEiInS_EOOU0RVFxfU8RKx1NmH9ednh6mzG7lM2-UPHO4HiO9a2bc-jQdR96ZPf3Wh9OovbJG6Mt920vYJQw1QXBczOBJHGWJqFAgpTkQSZMY0eI3MxPnEt4xAzEl7C51d_oVvliv2_qFXQR99NrEBBrWCiva41WsqZUqlnoVlXTUpMLRI-lPIDhoZpuDpMfoOdnUbgKg_j1Fk4ZiSukaEPoNl_f9A5lbVPc8yn6BTurfCE
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=ORING+FET+CONTROL+CIRCUIT+AND+METHOD&rft.inventor=Liang%2C+Chih-Wei&rft.inventor=Yeh%2C+Yung-Sheng&rft.date=2024-04-04&rft.externalDBID=A1&rft.externalDocID=US2024113703A1