Barrier Sync Signalling

A data processing device comprising: a plurality of processors, each of which has an associated sync request wire and an associated sync acknowledgment wire, both of which are used for co-ordinating barrier synchronisations. Each of the processors receives a signal representing a state of its sync a...

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Main Author FELIX, Stephen
Format Patent
LanguageEnglish
Published 04.01.2024
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Abstract A data processing device comprising: a plurality of processors, each of which has an associated sync request wire and an associated sync acknowledgment wire, both of which are used for co-ordinating barrier synchronisations. Each of the processors receives a signal representing a state of its sync acknowledgment wire, and asserts a sync request by setting a state of its sync request wire to be opposite to the state of its sync acknowledgement wire. The data processing device further comprises aggregation circuitry, which aggregates the state of the sync request wires to output an aggregate sync request to a sync controller. In response, the sync controller returns to each of the processors, an acknowledgment of the sync requests by causing the state of the sync acknowledgment wires to be set to be the same as the state of the sync request wires.
AbstractList A data processing device comprising: a plurality of processors, each of which has an associated sync request wire and an associated sync acknowledgment wire, both of which are used for co-ordinating barrier synchronisations. Each of the processors receives a signal representing a state of its sync acknowledgment wire, and asserts a sync request by setting a state of its sync request wire to be opposite to the state of its sync acknowledgement wire. The data processing device further comprises aggregation circuitry, which aggregates the state of the sync request wires to output an aggregate sync request to a sync controller. In response, the sync controller returns to each of the processors, an acknowledgment of the sync requests by causing the state of the sync acknowledgment wires to be set to be the same as the state of the sync request wires.
Author FELIX, Stephen
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Snippet A data processing device comprising: a plurality of processors, each of which has an associated sync request wire and an associated sync acknowledgment wire,...
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SubjectTerms CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Title Barrier Sync Signalling
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