INTEGRATED CIRCUIT PACKAGE WITH PSEUDO-STRIPLINE ARCHITECTURE
IC device package routing with metallization features comprising a pseudo-stripline architecture in which the stripline structure is provisioned, in part, by a routing structure separate from routing within the package substrate. A signal route within top metallization level of a package substrate m...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
28.12.2023
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Subjects | |
Online Access | Get full text |
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Summary: | IC device package routing with metallization features comprising a pseudo-stripline architecture in which the stripline structure is provisioned, in part, by a routing structure separate from routing within the package substrate. A signal route within top metallization level of a package substrate may be electrically shielded, in part, with a metallization feature within a redistribution layer (RDL) of a routing structure that couples one or more IC chips to the package substrate. Accordingly, a package substrate may have fewer levels of metallization, reduced thickness, and/or lower cost while the IC device package still offers excellent EMI performance. |
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Bibliography: | Application Number: US202217848059 |