VERTICAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE VERTICAL SEMICONDUCTOR DEVICE

A vertical semiconductor device includes: a lower structure; a multi-layer stack structure including a source layer formed over the lower structure and gate electrodes formed over the source layer; a vertical structure penetrating the multi-layer stack structure and including a channel layer insulat...

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Main Authors PARK, In-Su, KIM, Hai-Won, KIM, Jong-Gi, JEONG, Hoe-Min
Format Patent
LanguageEnglish
Published 14.12.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Abstract A vertical semiconductor device includes: a lower structure; a multi-layer stack structure including a source layer formed over the lower structure and gate electrodes formed over the source layer; a vertical structure penetrating the multi-layer stack structure and including a channel layer insulated from the source layer; a vertical source line spaced apart from the vertical structure to penetrate the multi-layer stack structure and contacting the source layer; and a horizontal source channel contact suitable for coupling the source layer and the channel layer and including a first conductive layer and a second conductive layer that include different dopants.
AbstractList A vertical semiconductor device includes: a lower structure; a multi-layer stack structure including a source layer formed over the lower structure and gate electrodes formed over the source layer; a vertical structure penetrating the multi-layer stack structure and including a channel layer insulated from the source layer; a vertical source line spaced apart from the vertical structure to penetrate the multi-layer stack structure and contacting the source layer; and a horizontal source channel contact suitable for coupling the source layer and the channel layer and including a first conductive layer and a second conductive layer that include different dopants.
Author KIM, Hai-Won
JEONG, Hoe-Min
KIM, Jong-Gi
PARK, In-Su
Author_xml – fullname: PARK, In-Su
– fullname: KIM, Hai-Won
– fullname: KIM, Jong-Gi
– fullname: JEONG, Hoe-Min
BookMark eNrjYmDJy89L5WSICnMNCvF0dvRRCHb19XT293MJdQ7xD1JwcQ3zdHZVcPRzUfB1DfHwd1FwA4q6OToFARWHePq5K4R4uCrg1czDwJqWmFOcyguluRmU3VxDnD10Uwvy41OLCxKTU_NSS-JDg40MjIxNDIwtTE0dDY2JUwUAZX00ew
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID US2023403855A1
GroupedDBID EVB
ID FETCH-epo_espacenet_US2023403855A13
IEDL.DBID EVB
IngestDate Fri Aug 23 06:55:33 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_US2023403855A13
Notes Application Number: US202318446827
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231214&DB=EPODOC&CC=US&NR=2023403855A1
ParticipantIDs epo_espacenet_US2023403855A1
PublicationCentury 2000
PublicationDate 20231214
PublicationDateYYYYMMDD 2023-12-14
PublicationDate_xml – month: 12
  year: 2023
  text: 20231214
  day: 14
PublicationDecade 2020
PublicationYear 2023
RelatedCompanies SK hynix Inc
RelatedCompanies_xml – name: SK hynix Inc
Score 3.5069504
Snippet A vertical semiconductor device includes: a lower structure; a multi-layer stack structure including a source layer formed over the lower structure and gate...
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Title VERTICAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE VERTICAL SEMICONDUCTOR DEVICE
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231214&DB=EPODOC&locale=&CC=US&NR=2023403855A1
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1NS8Mw9DGmqDedih9TAkpvxXVL1_YwZEtSq7B2dO0YXkY_QZBuuIp_35ew6U67JXkkJC-8r7yPADz2yjwpO4WJN5A5Os0yQ7e7eU93SsNMzbTvJJZMcB77fS-mb3Nz3oDPbS6MqhP6o4ojIkVlSO-14ter_0csrmIr10_pBw4tn91owLWNdYzKStegGh8NxCTgAdMYG8RTzQ8VjEovmDlEW-kAFWlL0oOYjWReympXqLincDjB9ar6DBpF1YJjtv17rQVH443LG5sb6lufw_tMhJGsX0CmEnuBz2MWBSHhYvbKBBn6nIxF5AWcoGlH3OEoVGnC_guJPEH2Tr6AB1dEzNNxk4s_nCzi6e6JepfQrJZVcQUksTsp6kC5ZXRzatnUdjJV4abo21aCHOUa2vtWutkPvoUT2ZXxHAZtQ7P--i7uUCrX6b1C5i-mmYfw
link.rule.ids 230,309,783,888,25576,76876
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfR1dS8Mw8BhTnG86FT-mBpS-Fde1XduHIVuT2unajq4dw5fRr4Eg3XAV_76XsOme9hZy5Egu3FfuIwCP6iJPFu1CxxvILFnLMkU2O7kqWwtFT_W0ayUGL3D2_K4ba68zfVaDz20tjOgT-iOaIyJHZcjvlZDXq_9HLCpyK9dP6QdOLZ-dqEeljXeMxkpH0SQ66LFxQANbsu1ePJH8UMA0HgXT--grHaCRbXB-YNMBr0tZ7SoV5wQOx4ivrE6hVpRNaNjbv9eacORtQt443HDf-gzepyyMeP8CMuHUC3wa21EQEsqmQ5uRvk-JxyI3oARdO-L0B6EoE_ZfSOQysnfxOTw4LLJdGTc5_6PJPJ7snki9gHq5LItLIInZTtEGyg2lk2uGqZlWJjrcFHjiBCXKFbT2YbreD76Hhht5o_lo6L_dwDEH8dwORWtBvfr6Lm5RQ1fpnSDsLzORiuM
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=VERTICAL+SEMICONDUCTOR+DEVICE+AND+METHOD+FOR+FABRICATING+THE+VERTICAL+SEMICONDUCTOR+DEVICE&rft.inventor=PARK%2C+In-Su&rft.inventor=KIM%2C+Hai-Won&rft.inventor=KIM%2C+Jong-Gi&rft.inventor=JEONG%2C+Hoe-Min&rft.date=2023-12-14&rft.externalDBID=A1&rft.externalDocID=US2023403855A1