INTEGRATED CIRCUIT WITH FEOL RESISTOR
A method includes forming a shallow trench isolation (STI) region in a semiconductor substrate thereby defining an active region and a passive region in the semiconductor substrate and spaced apart from each other by the STI region, forming a first sacrificial gate structure over the active region a...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
14.12.2023
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Subjects | |
Online Access | Get full text |
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