CONCEALED GATE TERMINAL SEMICONDUCTOR PACKAGES AND RELATED METHODS

• Main Authors: CABAHUG, Elsie Agdon, MANATAD, Romel N, ESTACIO, Maria Cristina, QUINONES, Maria Clemens Ypil, ALMAGRO, Erwin Ian Vamenta
• Format: Patent
• Language: English
• Published: 14.12.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Semiconductor packages may include a lead frame, one or more semiconductor die coupled with the lead frame, and an interposer coupled with the lead frame and with at least one of the one or more semiconductor die. The interposer in implementations includes an electrically conductive material coupled...