VERIFICATION SYSTEM OF BASIC INPUT OUTPUT SYSTEM AND VERIFICATION METHOD THEREOF
A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a microcontroller, and a verification device. The server includes a platform controller hub and the basic input output system. The server outputs a log file...
Saved in:
Main Authors | , , |
---|---|
Format | Patent |
Language | English |
Published |
09.11.2023
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a microcontroller, and a verification device. The server includes a platform controller hub and the basic input output system. The server outputs a log file of the basic input output system by a system management bus controller in the platform controller hub. The microcontroller is coupled to the server. The microcontroller receives the log file and converts the log file into a readable character. The verification device is coupled to the microcontroller. The verification device receives and displays the readable character. |
---|---|
AbstractList | A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a microcontroller, and a verification device. The server includes a platform controller hub and the basic input output system. The server outputs a log file of the basic input output system by a system management bus controller in the platform controller hub. The microcontroller is coupled to the server. The microcontroller receives the log file and converts the log file into a readable character. The verification device is coupled to the microcontroller. The verification device receives and displays the readable character. |
Author | Lai, Wen-Shyan Tu, Chang-Yu Lin, Cheng-Hung |
Author_xml | – fullname: Tu, Chang-Yu – fullname: Lin, Cheng-Hung – fullname: Lai, Wen-Shyan |
BookMark | eNrjYmDJy89L5WQICHMN8nTzdHYM8fT3UwiODA5x9VXwd1Nwcgz2dFbw9AsIDVHwDw0BUVBJRz8XBRRNvq4hHv4uCiEerkGu_m48DKxpiTnFqbxQmptB2c01xNlDN7UgPz61uCAxOTUvtSQ-NNjIwMjY2NTS1NjM0dCYOFUAl8UyHg |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
ExternalDocumentID | US2023359536A1 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_US2023359536A13 |
IEDL.DBID | EVB |
IngestDate | Fri Aug 02 08:54:49 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_US2023359536A13 |
Notes | Application Number: US202217964942 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231109&DB=EPODOC&CC=US&NR=2023359536A1 |
ParticipantIDs | epo_espacenet_US2023359536A1 |
PublicationCentury | 2000 |
PublicationDate | 20231109 |
PublicationDateYYYYMMDD | 2023-11-09 |
PublicationDate_xml | – month: 11 year: 2023 text: 20231109 day: 09 |
PublicationDecade | 2020 |
PublicationYear | 2023 |
RelatedCompanies | Tu Chang-Yu Lin Cheng-Hung COMPAL ELECTRONICS, INC Lai Wen-Shyan |
RelatedCompanies_xml | – name: Lai Wen-Shyan – name: Tu Chang-Yu – name: COMPAL ELECTRONICS, INC – name: Lin Cheng-Hung |
Score | 3.5097277 |
Snippet | A verification system of a basic input output system and a verification method thereof are provided. The verification system includes a server, a... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | VERIFICATION SYSTEM OF BASIC INPUT OUTPUT SYSTEM AND VERIFICATION METHOD THEREOF |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231109&DB=EPODOC&locale=&CC=US&NR=2023359536A1 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFD6MeX3TqniZElD6NtxsF9uHImub0gm9sKZjPo21TUGQbtiKf98kdDpf9hSSQw5J4Nxy8p0APHCbZJQCopwzrgJ1XBj9JS61_tJcGpkoWDaUILEgxH6qv85H8w58bLAwsk7otyyOyCUq5_LeSH29_rvEcuXbyvoxe-dDqxePWq7aRsfcWRkOTNW1LRJHbuSojmOliRpOJU1gUDU85rHSnnCkRaV9MrMFLmW9bVS8E9iPOb-qOYUOqxQ4cjZ_rylwGLQpbwUO5BvNvOaDrRzWZxDPePzltSBglLwllAQo8pA9TiYOmoRxSlGUUtG0xHHoon-TAkL9yEXUJ1MSeedw7xHq-H2-yMXvmSzSZHtH2gV0q1XFLgExQ2NPZcGywhzpONfMQmRO2TPO89LA-uAKers4Xe8m38Cx6EowntmDbvP5xW65VW6yO3mYPxF7iOM |
link.rule.ids | 230,309,786,891,25594,76904 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_G_JhvOhU_pgaUvg0322Xtw5CtTel0_WBNx3wa_UhBkG64iv--Seh0vuwpcEeO5ODucrn8LgAPPCbpuYAop4y7QA1nejvGudqOjVhPRMOyrgSJuR52Iu1l3pvX4GODhZF9Qr9lc0RuUSm391L669XfJZYl31auH5N3Tlo-23RgKVV2zA8r3Y6hWKMBCXzLNxXTHESh4k0lT2BQVTzkudJenyeFotM-mY0ELmW1HVTsY9gPuLyiPIEaK5rQMDd_rzXh0K1K3k04kG800zUnVna4PoVgxvMvuwIBo_AtpMRFvo1Gw3BsorEXRBT5ERVDxRx6Fvo3ySXU8S1EHTIlvn0G9zahptPmi1z86mQRhds7Us-hXiwLdgGI6Sp7yjOWZEZPw6lqZKJyyvo4TXMda51LaO2SdLWbfQcNh7qTxWTsvV7DkWBJYJ7Rgnr5-cVueIQuk1up2B-enYvO |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=VERIFICATION+SYSTEM+OF+BASIC+INPUT+OUTPUT+SYSTEM+AND+VERIFICATION+METHOD+THEREOF&rft.inventor=Tu%2C+Chang-Yu&rft.inventor=Lin%2C+Cheng-Hung&rft.inventor=Lai%2C+Wen-Shyan&rft.date=2023-11-09&rft.externalDBID=A1&rft.externalDocID=US2023359536A1 |