EXTRA DOPED REGION FOR BACK-SIDE DEEP TRENCH ISOLATION

The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate having sidewalls that form one or more trenches. The one or more trenches are disposed along opposing sides of a photodiode and vertically exte...

Full description

Saved in:
Bibliographic Details
Main Authors Chen, Chun-Yuan, Yaung, Dun-Nian, Ting, Shyh-Fann, Wang, Tzu-Jui, Wang, Yu-Jen, Tseng, Hsiao-Hui, Yamashita, Yuichiro, Sze, Jhy-Jyi, Chiang, Yen-Ting, Wang, Ching-Chun
Format Patent
LanguageEnglish
Published 19.10.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate having sidewalls that form one or more trenches. The one or more trenches are disposed along opposing sides of a photodiode and vertically extend from an upper surface of the semiconductor substrate to within the semiconductor substrate. A doped region is arranged along the upper surface of the semiconductor substrate and along opposing sides of the photodiode. A first dielectric lines the sidewalls of the semiconductor substrate and the upper surface of the semiconductor substrate. A second dielectric lines sidewalls and an upper surface of the first dielectric. The doped region has a width laterally between a side of the photodiode and a side of the first dielectric. The width of the doped region varyies at different heights along the side of the photodiode.
Bibliography:Application Number: US202318336100