APPARATUS AND METHOD

Apparatus comprises address processing circuitry to detect information relating to an input memory address provided by address information tables; the address processing circuitry being configured to select an address information table at a given table level according to earlier information entry in...

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Bibliographic Details
Main Author SWAINE, Andrew Brookfield
Format Patent
LanguageEnglish
Published 14.09.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Apparatus comprises address processing circuitry to detect information relating to an input memory address provided by address information tables; the address processing circuitry being configured to select an address information table at a given table level according to earlier information entry in an address information ;and the address table; and the address processing circuitry being configured to select an information entry in the selected address information table according to an offset component, the offset component being defined so that contiguous instances of that portion of the input memory address indicate contiguously addressed information entries; the address processing circuitry comprising detector circuitry to detect whether indicator data is set to indicate whether a group of one or more contiguously addressed information entries in the selected address information table provide at least one base address indicating a location within a contiguously addressed region comprising multiple address information tables at a later table level.
Bibliography:Application Number: US202117999649