MULTIPLE DIES HARDWARE PROCESSORS AND METHODS

• Main Authors: VARMA, ANKUSH, CHAMBERLAIN, JEFFREY D, NIMMAGADDA, SRIKANTH, KUMASHIKAR, MAHESH K, CHRYSOS, GEORGE Z, GEETHA, VEDARAMAN, AYERS, JOHN R, MOLNAR, CARLETON L, SUBBAREDDY, DHEERAJ R, SISTLA, KRISHNAKANTH V, LIU, YENNG, SINGH, TEJPAL, PASDAST, GERALD, HALLECK, WILLIAM R, NASSIF, NEVINE, EAPATI, SIVA SOUMYA
• Format: Patent
• Language: English
• Published: 01.06.2023
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

Methods and apparatuses relating to hardware processors with multiple interconnected dies are described. In one embodiment, a hardware processor includes a plurality of physically separate dies, and an interconnect to electrically couple the plurality of physically separate dies together. In another...