ERROR DETECTION AT LAYERS OF A NEURAL NETWORK
A processing system performs error detection at each of a plurality of layers of a neural network, such as a neural network implemented at a computational analog memory. By performing error detection at the layer level, the processing system is able to account for write errors when updating neural n...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
27.04.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A processing system performs error detection at each of a plurality of layers of a neural network, such as a neural network implemented at a computational analog memory. By performing error detection at the layer level, the processing system is able to account for write errors when updating neural network weights, without waiting for backpropagation based on an output of the neural network. The processing system thereby reduces the amount of time needed to train the network, both by reducing the number of training epochs, and by reducing the length of the individual training epochs. |
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Bibliography: | Application Number: US202117511777 |