LOW RESISTANCE APPROACHES FOR FABRICATING CONTACTS AND THE RESULTING STRUCTURES

• Main Authors: CHOUKSEY, Siddharth, KAVALIEROS, Jack T, LU, Mengcheng, HARATIPOUR, Nazila, GLASS, Glenn A, DEWEY, Gilbert, METZ, Matthew V, MURTHY, Anand S, GANGULY, Koustav, KEECH, Ryan, JHA, Jitendra Kumar, SEN GUPTA, Arnab
• Format: Patent
• Language: English
• Published: 31.03.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Low resistance approaches for fabricating contacts, and semiconductor structures having low resistance metal contacts, are described. In an example, an integrated circuit structure includes a semiconductor structure above a substrate. A gate electrode is over the semiconductor structure, the gate electrode defining a channel region in the semiconductor structure. A first semiconductor source or drain structure is at a first end of the channel region at a first side of the gate electrode. A second semiconductor source or drain structure is at a second end of the channel region at a second side of the gate electrode, the second end opposite the first end. A source or drain contact is directly on the first or second semiconductor source or drain structure, the source or drain contact including a barrier layer and an inner conductive structure.