SEMICONDUCTOR DEVICES
A semiconductor device including a substrate including a recess; a gate insulation layer on a surface of the recess; a first gate pattern on the gate insulation layer and filling a lower portion of the recess; a second gate pattern on the first gate pattern in the recess and including a material hav...
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| Main Authors | , , , , , , |
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| Format | Patent |
| Language | English |
| Published |
03.02.2022
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| Subjects | |
| Online Access | Get full text |
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| Abstract | A semiconductor device including a substrate including a recess; a gate insulation layer on a surface of the recess; a first gate pattern on the gate insulation layer and filling a lower portion of the recess; a second gate pattern on the first gate pattern in the recess and including a material having a work function different from a work function of the first gate pattern; a capping insulation pattern on the second gate pattern and filling an upper portion of the recess; a leakage blocking oxide layer on the gate insulation layer at an upper sidewall of the recess above an upper surface of the first gate pattern and contacting a sidewall of the capping insulation pattern; and impurity regions in the substrate and adjacent to the upper sidewall of the recess, each impurity region having a lower surface higher than the upper surface of the first gate pattern. |
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| AbstractList | A semiconductor device including a substrate including a recess; a gate insulation layer on a surface of the recess; a first gate pattern on the gate insulation layer and filling a lower portion of the recess; a second gate pattern on the first gate pattern in the recess and including a material having a work function different from a work function of the first gate pattern; a capping insulation pattern on the second gate pattern and filling an upper portion of the recess; a leakage blocking oxide layer on the gate insulation layer at an upper sidewall of the recess above an upper surface of the first gate pattern and contacting a sidewall of the capping insulation pattern; and impurity regions in the substrate and adjacent to the upper sidewall of the recess, each impurity region having a lower surface higher than the upper surface of the first gate pattern. |
| Author | LEE, Sangwoon KIM, Hyewon IM, Donghyun WE, Juhyung RIM, Taiuk CHAE, Kyosuk YOON, Sungmi |
| Author_xml | – fullname: IM, Donghyun – fullname: LEE, Sangwoon – fullname: KIM, Hyewon – fullname: RIM, Taiuk – fullname: CHAE, Kyosuk – fullname: WE, Juhyung – fullname: YOON, Sungmi |
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| Notes | Application Number: US202117210931 |
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| RelatedCompanies | SAMSUNG ELECTRONICS CO., LTD |
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| Snippet | A semiconductor device including a substrate including a recess; a gate insulation layer on a surface of the recess; a first gate pattern on the gate... |
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| SubjectTerms | ELECTRICITY |
| Title | SEMICONDUCTOR DEVICES |
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