THRESHOLD VOLTAGE SETTING WITH BOOSTING READ SCHEME

• Main Authors: Oowada, Ken, Sakakibara, Kiyohiko, Higashitani, Masaaki, Yabe, Hiroki
• Format: Patent
• Language: English
• Published: 31.12.2020
• Subjects: ELECTRICITY; INFORMATION STORAGE; PHYSICS; STATIC STORES

Methods for reducing read disturb using NAND strings with poly-silicon channels and p-type doped source lines are described. During a boosted read operation for a selected memory cell transistor in a NAND string, a back-gate bias or bit line voltage may be applied to a bit line connected to the NAND...