REDUCING EFFECTS OF READ ARRAY OPERATIONS OF READ APPARENT VOLTAGE

A computer-implemented method, according to one embodiment, includes: receiving a stream of data, and selecting more than one block of memory to write the stream of data to. The selected blocks of memory are in a memory that includes a plurality of blocks. Moreover, the data is written across the se...

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Main Authors Papandreou, Nikolaos, Fisher, Timothy J, Sallese, Kevin E, Yanes, Adalberto G, Huynh, Van, Ma, Jason Szecheong, Keller, Charles A, Fry, Aaron D
Format Patent
LanguageEnglish
Published 02.04.2020
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A computer-implemented method, according to one embodiment, includes: receiving a stream of data, and selecting more than one block of memory to write the stream of data to. The selected blocks of memory are in a memory that includes a plurality of blocks. Moreover, the data is written across the selected blocks of memory in parallel. The blocks of memory are also selected such that no two or more of the selected blocks of memory have an effect on a read apparent voltage of a same one of the plurality of blocks in the memory. Other systems, methods, and computer program products are described in additional embodiments.
Bibliography:Application Number: US201816148924