PREVENTION OF EXTENSION NARROWING IN NANOSHEET FIELD EFFECT TRANSISTORS

Semiconductor devices include semiconductor layers and a gate stack formed on and around the semiconductor layers. Spacers are formed between vertically adjacent semiconductor layers, each spacer having a first spacer layer and a second spacer layer. The first spacer layer is positioned between the...

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Bibliographic Details
Main Authors Zhang, Chen, Yeung, Chun W, Yamashita, Tenko
Format Patent
LanguageEnglish
Published 05.03.2020
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES
NANOTECHNOLOGY
PERFORMING OPERATIONS
SEMICONDUCTOR DEVICES
SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES
TRANSPORTING
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Summary:Semiconductor devices include semiconductor layers and a gate stack formed on and around the semiconductor layers. Spacers are formed between vertically adjacent semiconductor layers, each spacer having a first spacer layer and a second spacer layer. The first spacer layer is positioned between the gate stack and the second spacer layer. The second spacer layer of each spacer has a trapezoidal cross-section.
Bibliography:Application Number: US201916675778