PINCHED DOPED WELL FOR A JUNCTION FIELD EFFECT TRANSISTOR (JFET) ISOLATED FROM THE SUBSTRATE

• Main Authors: Melanson John L, Tarabbia Marc L, Pan Shanjen
• Format: Patent
• Language: English
• Published: 12.10.2017
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES; MICROSTRUCTURAL TECHNOLOGY; PERFORMING OPERATIONS; SEMICONDUCTOR DEVICES; TRANSPORTING

A JFET structure may be formed such that the channel region is isolated from the substrate to reduce parasitic capacitance. For example, instead of using a deep well as part of a gate structure for the JFET, the deep well may be used as an isolation region from the surrounding substrate. As a result...