METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING HARD MASK PATTERNING

Methods of fabricating semiconductor devices may include forming an isolation region that defines a plurality of fin active regions on a semiconductor substrate, forming a sacrificial gate layer on the semiconductor substrate, forming a first hard mask line that crosses first and second fin active r...

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Bibliographic Details
Main Authors YOU Junggun, Choi Jeongmin, Kim Ingyum
Format Patent
LanguageEnglish
Published 25.08.2016
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Methods of fabricating semiconductor devices may include forming an isolation region that defines a plurality of fin active regions on a semiconductor substrate, forming a sacrificial gate layer on the semiconductor substrate, forming a first hard mask line that crosses first and second fin active regions and an edge bard mask line that crosses an edge fin active region, and forming a gate cut mask having a plurality of gate cut openings. The plurality of gate cut openings may include first and second gate cut openings that have a first width and are adjacent to the first and second fin active regions, respectively, and an edge gate cut opening that is adjacent to the edge fin active region and has a second width that is greater than the first width but smaller than twice a size of the first width.
Bibliography:Application Number: US201615050784