Double-Resurf LDMOS With Drift And PSURF Implants Self-Aligned To A Stacked Gate "BUMP" Structure
A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field "bump" oxide region and an optional raised dielectric structure that provides a raised support for the LDMOS transistor's polysilicon gate electrode. Fabrication of the shallow field oxide regio...
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Format | Patent |
Language | English |
Published |
01.10.2015
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Abstract | A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field "bump" oxide region and an optional raised dielectric structure that provides a raised support for the LDMOS transistor's polysilicon gate electrode. Fabrication of the shallow field oxide region is performed through a hard "bump" mask and controlled such that the bump oxide extends a minimal depth into the LDMOS transistor's drift (channel) region. The hard "bump" mask is also utilized to produce an N-type drift (N-drift) implant region and a P-type surface effect (P-surf) implant region, whereby these implants are "self-aligned" to the gate dielectric structure. The N-drift implant is maintained at Vdd by connection to the LDMOS transistor's drain diffusion. An additional Boron implant is utilized to form a P-type buried layer that connects the P-surf implant to the P-body region of the LDMOS transistor, whereby the P-surf implant is maintained at 0V. |
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AbstractList | A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field "bump" oxide region and an optional raised dielectric structure that provides a raised support for the LDMOS transistor's polysilicon gate electrode. Fabrication of the shallow field oxide region is performed through a hard "bump" mask and controlled such that the bump oxide extends a minimal depth into the LDMOS transistor's drift (channel) region. The hard "bump" mask is also utilized to produce an N-type drift (N-drift) implant region and a P-type surface effect (P-surf) implant region, whereby these implants are "self-aligned" to the gate dielectric structure. The N-drift implant is maintained at Vdd by connection to the LDMOS transistor's drain diffusion. An additional Boron implant is utilized to form a P-type buried layer that connects the P-surf implant to the P-body region of the LDMOS transistor, whereby the P-surf implant is maintained at 0V. |
Author | BERKOVITCH NOEL LEVY SAGY LEVIN SHARON |
Author_xml | – fullname: LEVIN SHARON – fullname: BERKOVITCH NOEL – fullname: LEVY SAGY |
BookMark | eNqNir0OgjAYADvo4N87fMGZRDBqGKuImkgkFOJIKnxVYm1Jad9fBh_A6XKXm5KR0gonhMfaPST6OfbOCLjG6Y3BvbUviE0rLFDVQMbKPIHLp5Nc2R4YSuFT2T4VNlBooMAsr9-DnLhF8PZlmnlDM662zuCcjAWXPS5-nJFlciwOZx87XWHf8RoV2qpk4SrYhLso2kY0WP93fQFGDjy0 |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | US2015279969A1 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_US2015279969A13 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 16:55:25 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_US2015279969A13 |
Notes | Application Number: US201514740080 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151001&DB=EPODOC&CC=US&NR=2015279969A1 |
ParticipantIDs | epo_espacenet_US2015279969A1 |
PublicationCentury | 2000 |
PublicationDate | 20151001 |
PublicationDateYYYYMMDD | 2015-10-01 |
PublicationDate_xml | – month: 10 year: 2015 text: 20151001 day: 01 |
PublicationDecade | 2010 |
PublicationYear | 2015 |
RelatedCompanies | TOWER SEMICONDUCTOR LTD |
RelatedCompanies_xml | – name: TOWER SEMICONDUCTOR LTD |
Score | 3.0016987 |
Snippet | A double-RESURF LDMOS transistor has a gate dielectric structure including a shallow field "bump" oxide region and an optional raised dielectric structure that... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Double-Resurf LDMOS With Drift And PSURF Implants Self-Aligned To A Stacked Gate "BUMP" Structure |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151001&DB=EPODOC&locale=&CC=US&NR=2015279969A1 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1dT8IwFG2IGvVNUeMHmhs0e1vcRgV5IGZsLMQ4WBhT3sjadbpkGQRG_PveVlCeeOtH0rRNzr3ntrenhDwkrGkZiaC64Kmh09RESFktU2eNZwx72jEz1F-H_qDZj-jr5GlSIfnmLYzSCf1W4oiIKI54L5W9nv8fYrkqt3L5yDJsmr14446rraNjdF9odjW32-kFQ3foaI7TiUJtMFJ9VgvJfdvGWGkfiXRL4qH33pXvUubbTsU7IQcBjleUp6Qiiio5cjZ_r1XJob--8sbiGn3LMxIj22W50EdiuVqk8Ob6wxA-svIL3EWWlmAXCQRhNPJAav7KBBcIRZ7qdp59ojWF8QxsQHaJwE1AHptBvRv5QR1CJSK7Wohzcu_1xk5fx7lO_7ZmGoXbC2tckL1iVohLAmkiDE65FVOT0zaPWWJwKZVDk7iBlMi8IrVdI13v7r4hx7L6m9RWI3s4S3GLzrlkd2pPfwBaKJDB |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3fT8IwEL4QNOKbosYfqA2avS1uY4I8EDM2FlQGC9uUN7JunS5ZBoER_32vFZQn3ppe0rRNvrvv2utXgPuYNjUlZrrMokSR9URFSGktVaaNJ0x72iFVxF-HzrDZD_TXyeOkBNnmLYzQCf0W4oiIqAjxXgh_Pf8_xLJEbeXygabYNXu2_Y4lrbNjDF_odiWr2-m5I2tkSqbZCTxpOBY2rYXkvm1grrSHJLvF8dB77_J3KfPtoGIfwb6L4-XFMZRYXoWKufl7rQoHzvrKG5tr9C1PIES2SzMmj9lytUjIwHJGHvlIiy9iLdKkIEYeE9cLxjbhmr-8wIV4LEtkI0s_0ZsSf0YMguwSgRsTfmxG6t3AcevEEyKyqwU7hTu755t9Gec6_duaaeBtL6xxBuV8lrNzIEnMlEiPtFBXI70dhTRWIi6Vo8dhAymRegG1XSNd7jbfQqXvO4Pp4GX4dgWH3PRb4FaDMs6YXWOgLuiN2N8fUWeTtA |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Double-Resurf+LDMOS+With+Drift+And+PSURF+Implants+Self-Aligned+To+A+Stacked+Gate+%22BUMP%22+Structure&rft.inventor=LEVIN+SHARON&rft.inventor=BERKOVITCH+NOEL&rft.inventor=LEVY+SAGY&rft.date=2015-10-01&rft.externalDBID=A1&rft.externalDocID=US2015279969A1 |