Spacer Design to Prevent Trapped Electrons
Charge-trapping field effect transistors may be formed into an array on a wafer suitable to be a NAND memory device. A thick oxide layer is applied over the gates to ensure that the gap between the gates is filled. The filled gap substantially prevents nitride from being trapped, which could otherwi...
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Main Author | |
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Format | Patent |
Language | English |
Published |
10.04.2014
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Subjects | |
Online Access | Get full text |
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