MEMORY CONTROLLER, ELECTRONIC DEVICE HAVING THE SAME AND METHOD FOR OPERATING THE SAME
A memory controller includes first and second interfaces, a microprocessor, a register and a plane control unit. The first interface is configured to receive a first command and plane logic information of a plurality of planes in a memory device from a host. The microprocessor is coupled to the firs...
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Format | Patent |
Language | English |
Published |
06.03.2014
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Subjects | |
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Abstract | A memory controller includes first and second interfaces, a microprocessor, a register and a plane control unit. The first interface is configured to receive a first command and plane logic information of a plurality of planes in a memory device from a host. The microprocessor is coupled to the first interface, and configured to decode the first command to provide a corresponding second command, and to map the plane logic information to be suited to a non-volatile memory device. The register is configured to queue the second command and the mapped plane logic information. The second interface is configured to provide the second command and the queued plane logic information to the memory device. The plane control unit is configured to control multiple planes corresponding to portions of the queued plane logic information to perform concurrently the second command in the non-volatile memory device. |
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AbstractList | A memory controller includes first and second interfaces, a microprocessor, a register and a plane control unit. The first interface is configured to receive a first command and plane logic information of a plurality of planes in a memory device from a host. The microprocessor is coupled to the first interface, and configured to decode the first command to provide a corresponding second command, and to map the plane logic information to be suited to a non-volatile memory device. The register is configured to queue the second command and the mapped plane logic information. The second interface is configured to provide the second command and the queued plane logic information to the memory device. The plane control unit is configured to control multiple planes corresponding to portions of the queued plane logic information to perform concurrently the second command in the non-volatile memory device. |
Author | MOON JEONG-WOOK YI JONG-WON KIM YU-SUNG |
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Snippet | A memory controller includes first and second interfaces, a microprocessor, a register and a plane control unit. The first interface is configured to receive a... |
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SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | MEMORY CONTROLLER, ELECTRONIC DEVICE HAVING THE SAME AND METHOD FOR OPERATING THE SAME |
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