Efficient Predicated Execution For Parallel Processors
The invention set forth herein describes a mechanism for predicated execution of instructions within a parallel processor executing multiple threads or data lanes. Each thread or data lane executing within the parallel processor is associated with a predicate register that stores a set of 1-bit pred...
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| Main Authors | , , |
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| Format | Patent |
| Language | English |
| Published |
31.03.2011
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| Subjects | |
| Online Access | Get full text |
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| Abstract | The invention set forth herein describes a mechanism for predicated execution of instructions within a parallel processor executing multiple threads or data lanes. Each thread or data lane executing within the parallel processor is associated with a predicate register that stores a set of 1-bit predicates. Each of these predicates can be set using different types of predicate-setting instructions, where each predicate setting instruction specifies one or more source operands, at least one operation to be performed on the source operands, and one or more destination predicates for storing the result of the operation. An instruction can be guarded by a predicate that may influence whether the instruction is executed for a particular thread or data lane or how the instruction is executed for a particular thread or data lane. |
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| AbstractList | The invention set forth herein describes a mechanism for predicated execution of instructions within a parallel processor executing multiple threads or data lanes. Each thread or data lane executing within the parallel processor is associated with a predicate register that stores a set of 1-bit predicates. Each of these predicates can be set using different types of predicate-setting instructions, where each predicate setting instruction specifies one or more source operands, at least one operation to be performed on the source operands, and one or more destination predicates for storing the result of the operation. An instruction can be guarded by a predicate that may influence whether the instruction is executed for a particular thread or data lane or how the instruction is executed for a particular thread or data lane. |
| Author | JOHNSON RICHARD CRAIG GLANVILLE ROBERT STEVEN NICKOLLS JOHN R |
| Author_xml | – fullname: NICKOLLS JOHN R – fullname: JOHNSON RICHARD CRAIG – fullname: GLANVILLE ROBERT STEVEN |
| BookMark | eNrjYmDJy89L5WQwc01Ly0zOTM0rUQgoSk3JTE4sSU1RcK1ITS4tyczPU3DLL1IISCxKzMlJzQGqyE9OLS7OLyrmYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBoaGBuYWJoamjobGxKkCAE70MCY |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences Physics |
| ExternalDocumentID | US2011078415A1 |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_US2011078415A13 |
| IEDL.DBID | EVB |
| IngestDate | Fri Aug 30 05:41:45 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_US2011078415A13 |
| Notes | Application Number: US20100891629 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110331&DB=EPODOC&CC=US&NR=2011078415A1 |
| ParticipantIDs | epo_espacenet_US2011078415A1 |
| PublicationCentury | 2000 |
| PublicationDate | 20110331 |
| PublicationDateYYYYMMDD | 2011-03-31 |
| PublicationDate_xml | – month: 03 year: 2011 text: 20110331 day: 31 |
| PublicationDecade | 2010 |
| PublicationYear | 2011 |
| Score | 2.8090599 |
| Snippet | The invention set forth herein describes a mechanism for predicated execution of instructions within a parallel processor executing multiple threads or data... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| Title | Efficient Predicated Execution For Parallel Processors |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110331&DB=EPODOC&locale=&CC=US&NR=2011078415A1 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3da8IwED_Efb5t3cY-3Ahs9K1M1rTWhzJmP5CBWqYdvknTpiBIK22H_vm7xHbzydccCbmQy33-LgAvKUtNC_WapvcpOiiMcY29Ua71uJkwvCNWRAV2eDQ2hyH9nBvzFqwaLIzsE7qRzRFRomKU90q-1-v_IJYrayvLV7bEofzdn9mumjThvq4AALkD2wsm7sRRHccOp-r4a0cTOTbjA32lI2FIi0773vdA4FLW-0rFv4DjANfLqkto8UyBM6f5e02B01Gd8lbgRNZoxiUO1nJYXoHpyc4POJkEhUy1oOFIvC2P5T0ifl6QICrEPykrUmMB8qK8hmffmzlDDbey-ON8EU73963fQDvLM34LxELFHxlGL-ojH2gzsW5kWXFKdZoytDiSO-gcWun-MPkBznehUwG960C7Kn74I-reij3JI_sFQICGvA |
| link.rule.ids | 230,309,786,891,25594,76906 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_G_JhvWpWpUwvK3orD9fOhiOsHVdetuFb2NpouBWG0o63on-8la3VPe82RkIRc7nJ3v18A7lOSqjraNWloyPhAIYRK5FGmkkbVJcEzoscyww77E9WL5Ne5Mm_BqsHCcJ7Qb06OiBqVoL5X_L5e_wexbF5bWT6QT2zKn9zQtPvLJtw3YAAge2Q6wdSeWn3LMqNZf_K-kbEcm_KMb6U9jfHzMufpY8RwKetto-Iew36A42XVCbRoJkDHav5eE-DQr1PeAhzwGs2kxMZaD8tTUB3O_ICdxaDgqRZ0HEXnhyb8HIluXohBXLB_UlZijQXIi_IM7lwntDwJp7L4W_kimm3Pe3gO7SzPaBdEHQ1_rChabCgGYxgjg1jXk1QeyilBj2N5Ab1dI13uFt9Cxwv98WL8Mnm7gqNNGJXB8HrQrooveo12uCI3fPt-AbaUiak |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Efficient+Predicated+Execution+For+Parallel+Processors&rft.inventor=NICKOLLS+JOHN+R&rft.inventor=JOHNSON+RICHARD+CRAIG&rft.inventor=GLANVILLE+ROBERT+STEVEN&rft.date=2011-03-31&rft.externalDBID=A1&rft.externalDocID=US2011078415A1 |