Error propagation control within integrated circuits
A method of selecting where error detection circuits should be placed within an integrated circuit uses simulation of a reference and test design with errors injected into the test design and then fan out analysis performed upon those injected errors to identify error propagation characteristics. Th...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.02.2009
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Subjects | |
Online Access | Get full text |
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